EDN

FPGA-to-ASIC conversion a crucial concern

It is clear that FPGAs are great for prototyping and low-volume production. It's also clear, however, that any relatively complex mid- to high-volume design for which power consumption, component cost ...
Business Wire

Faraday Unveiled FPGA-Go-ASIC Prototyping Platform to Accelerate FPGA-to-ASIC Conversion

HSINCHU, Taiwan--(BUSINESS WIRE)--Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today unveiled its FPGA-Go-ASIC™ prototyping platform solution. This ...
EDN

An FPGA primer for ASIC designers

With the advent of new technologies in IC design and complexity of the business models, chip designers may want to explore different choices available to them for implementation. ASICs have been the ...
Business Wire

BitHull Overtakes ASIC Market with New FPGA Miners

COPENHAGEN, Denmark--(BUSINESS WIRE)--BitHull S.A. ( www.BitHull.com) is pleased to announce the launch of its two new crypto miners BH Miner and BH Miners Box. These miners have been built around ...
AV Network

Justin Kennington on AV Supply Chain Using FPGA vs. ASIC Chips

SDVoE Alliance President, Justin Kennington shares his perspective on how FPGA versus ASIC chips impacts the product supply chain in the AV industry. When you purchase through links on our site, we ...
Semiconductor Engineering

FPGA And System Designs Get To Market Faster Leveraging ASIC-Proven Analysis Tools

Digital systems need clocks. Today’s designs require more from clocking schemes than ever before, and it’s likely this trend will continue. Increasing power constraints have resulted in finer-grained ...
Semiconductor Engineering

The FPGA Alternative

Until a few years ago, SoC designers focused almost exclusively on ASICs. While it was theoretically possible to create an SoC design for an FPGA, the programmable chips were too bulky and pricey to ...
Digi Times

FPGA vs ASIC: Altera CEO highlights FPGA's advantage in AI era

Embedded World 2025 officially commenced this week in Nuremberg, Germany, with Sandra Rivera, CEO of FPGA company Altera, delivering the keynote address. In her presentation, Rivera discussed key ...
Electronic Design

ASICs, Structured ASICs, And FPGAs

How close in performance and integration are FPGAs and ASICs? Advances in FPGA architectures and the use of 90-nm process rules have allowed the latest generation of FPGAs to achieve levels of ...
Electronic Design

Structured ASICs Plan To Outpace FPGAs

Although it lacks the reprogrammability of an FPGA, this structured ASIC promises to deliver 350 MHz of system performance, densities of up to 2.2 million ASIC gates, and 8.8 Mb of memory. System ...
SDxCentral

Intel Agilex FPGA, ASICs Power Next-Gen DPUs

Intel debuted two infrastructure processing units (IPUs) alongside an updated acceleration development platform during its annual Architecture Day this week. Intel first teased the IPUs — what the ...
Design News

Is Platypus from Zero ASIC the FPGA equivalent to RISC-V?

Before I tell you what I’m about to tell you, let’s first refresh our minds as to RISC-V processors. Why? Well, because even though what I’m about to tell you has nothing to do with RISC-V per se, in ...